1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device having improved breakdown voltage characteristics and reduced ON resistance, as well as a method for manufacturing such a semiconductor device.
2. Description of the Background Art
In recent years, in order to achieve a high breakdown voltage, low loss, and the like of semiconductor devices, silicon carbide has been adopted as a material for semiconductor devices. Silicon carbide is a wide band gap semiconductor having a band gap larger than that of silicon, which has been conventionally widely used as a material for semiconductor devices. Hence, by adopting silicon carbide as a material for a semiconductor device, the semiconductor device can have a high breakdown voltage, reduced ON resistance, and the like.
An exemplary semiconductor device adopting silicon carbide as its material is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or the like. The MOSFET is a semiconductor device that controls existence/non-existence of an inversion layer in a channel region in accordance with a predetermined threshold voltage so as to conduct and interrupt a current. For example, a trench gate type MOSFET or the like characterized by formation of a channel region along a wall surface of a trench has been considered.
In the trench gate type MOSFET, ON resistance can be reduced, but breakdown voltage characteristics are disadvantageously deteriorated due to electric field concentration on a gate insulating film formed in a bottom portion of the trench. To address this, for example, it has been proposed to form in a substrate a p type deep region extending to a region as deep as or deeper than the trench, extend a depletion layer from a pn junction between the p type deep region and an n type drift region, and thereby mitigate electric field concentration on the bottom portion of the trench (see for example Japanese Patent Laying-Open No. 2009-117593 (Patent Literature 1)).
In the MOSFET proposed in Patent Literature 1, the trench and the deep region are each formed to extend in a thickness direction of the substrate in parallel. Therefore, when the MOSFET is miniaturized, a region between the trench and the deep region is narrowed and thus a passage for carriers is narrowed, resulting in an increase in ON resistance of the MOSFET.